ARM Cortex-A76

ARM Cortex-A76 (Kryo 485 Gold Prime, 2.84 GHz), Qualcomm Snapdragon 855, 7 nm, 73 mm2, 6.7BT, Xiaomi Mi 9T Pro, 6 GB LPDDR4.

• L1 Data cache = 64 KB, 64 B/line, 4-WAY, Pseudo-LRU. interfaces to the L2: 256-bit write / 256-bit read. Two 128-bit read paths from the data L1 memory system to the datapath. 256-bit write path from the datapath to the L1 memory system.
• L1 Instruction cache = ? KB, 64 B/line, 4-WAY, Pseudo-LRU, VIPT. 256-bit read interface from the L2 memory system.
• L2 Cache = 512 KB (Prime core), 64 B/line, 8-WAY. Strictly inclusive with L1 data cache. Weakly inclusive with L1 instruction cache.
• L3 Cache = 2 MB, 64 B/line, ?-WAY.
• L4 (SLC) Cache = 3 MB

• L1 Data Cache Latency = 4 cycles for simple access via pointer
• L1 Data Cache Latency = 4 cycles for access with complex address calculation (size_t n, *p; n = p[n]).
• L2 Cache Latency = 11 cycles
• L3 Cache Latency = 11 cycles + 10 ns
• RAM Latency = 11 cycles + 140 ns

• Data L1 TLB: 48 items. full-assoc 4KB, 16KB, 64KB, 2MB, and 512MB granularity.
• Instruction TLB L1: 48 items. full-assoc. 4KB, 16KB, 64KB, 2MB, and 32MB granularity.
• TLB L2: 1280 items. 5-way. 4KB, 16KB, 64KB, 2MB, 32MB, 512MB, and 1GB block sizes. Intermediate physical address (IPA) to PA mappings for 2MB and 1GB (in a 4KB translation granule), 32MB (in a 16K translation granule), and 512MB (in a 64K granule) block sizes. Only Non-secure EL1 and EL0 stage 2 translations are cached. The L2 TLB supports four translation table walks in parallel (four TLB misses), and can service two TLB lookups while the translation table walks are in progress. If there are six successive misses, the L2 TLB will stall.

4 KB pages mode (64-bit Android 9, Linux 4.14)

• Data TLB L1: 48 items. full-assoc. Miss penalty = 5 cycles for L1 cache access, and 3 cycles for L2 cache access. Parallel miss: 1 cycles per access
• Data TLB L2: 1280 items. 5-way. Miss penalty = 30. Parallel miss: 13 cycles per access (including L2 cache access latency)

  Size       Latency        Increase   Description

  64 K     4                          
 128 K     8               4           + 7 (L2)        
 256 K    10               2           + 3 (L1 TLB miss)        
 512 K    12 +  1 ns       2 + 1  ns        
   1 M    13 +  6 ns       1 + 5  ns   + 10 ns (L3)
   2 M    14 +  9 ns       1 + 3  ns          
   4 M    14 + 24 ns         + 15 ns           
   8 M    28 + 66 ns      14 + 22 ns   + 30 (L2 TLB miss) + 140 ns (RAM)
  16 M    36 +100 ns       8 + 34 ns   
  32 M    40 +118 ns       4 + 18 ns
  64 M    42 +128 ns       2 + 10 ns
 128 M    43 +136 ns       1 +  8 ns   
 256 M    44 +140 ns       1 +  4 ns
 512 M    44 +143 ns         +  3 ns
   1 G    44 +166 ns         + 23 ns
   2 G    44 +212 ns         + 46 ns

MISC

• Branch misprediction penalty = 14 cycles

• 64/128/256/512/1024/2048 bytes range cross penalty = 6 cycles
• 4096 bytes range cross penalty = 1 cycles. Why that penalty is smaller than penalty in smaller ranges?

• L1 B/W (Parallel Random Read) = 0.53 cycle per one access

• L2->L1 B/W (Parallel Random Read) = 2.24 cycles per cache line
• L2->L1 B/W (Read, 64 bytes step) = 2.1 cycles per cache line
• L2->L1 B/W (Read, 64 Bytes step - pointer chasing) = 4.5 cycles per cache line (HW prefetch)
• L2 Write (Write, 64 bytes step) = 2.5 cycles per write

• L3->L1 B/W (Parallel Random Read) = 15 cycles per cache line (inluding L1 TLB miss)
• L3->L1 B/W (Read, 64 bytes step) = 6 cycles per cache line
• L3->L1 B/W (Read, 64 Bytes step - pointer chasing) = 6 cycles per cache line (HW prefetch)
• L3 Write (Write, 64 bytes step) = 7.5 cycles per write

• L4->L1 B/W (Read, 64 bytes step) = 7 cycles per cache line
• L4->L1 B/W (Read, 64 Bytes step - pointer chasing) = 8 cycles per cache line (HW prefetch)
• L4 (SLC) Write (Write, 8 bytes step, full) = 38 GB/s
• L4 (SLC) Write (Write, 64 bytes step) = 8 cycles per write

• RAM Read B/W (Parallel Random Read) = 15 ns / access line
• RAM Read B/W (Read, 8-64 Bytes step) = 16-19 GB/s
• RAM Read B/W (Read, 8 Bytes step - pointer chasing) = 5 GB/s
• RAM Read B/W (Read, 32-64 Bytes step - pointer chasing) = 14 GB/s (HW prefetch)
• RAM Write B/W (Write, 8 Bytes step, full) = 31 GB/s
• RAM Write B/W (Write, 64 Bytes step) = 8 GB/s

7-Zip Benchmark

# 7z b : MIPS values are normalized with Intel Core 2 cpu.
# gcc-6 -march=armv8-a -O2

# Snapdragon 855: 1x A76 2840 MHz + 3x A76 2420 MHz

#### TWRP, root shell
### Kryo 485 Gold Prime (Cortex-A76)
LE
CPU Freq:  2834  2835  2836  2834  2836  2835  2836  2836  2836

RAM size:    5524 MB,  # CPU hardware threads:   1
RAM usage:    435 MB,  # Benchmark threads:      1

                       Compressing  |                  Decompressing
Dict     Speed Usage    R/U Rating  |      Speed Usage    R/U Rating
         KiB/s     %   MIPS   MIPS  |      KiB/s     %   MIPS   MIPS

22:       3158   100   3086   3073  |      42750   100   3659   3650
23:       2870   100   2937   2925  |      41740   100   3622   3613
24:       2669   100   2883   2871  |      39953   100   3516   3507
25:       2481   100   2845   2833  |      37689   100   3363   3355
----------------------------------  | ------------------------------
Avr:             100   2938   2925  |              100   3540   3531
Tot:             100   3239   3228


RAM usage:    441 MB,  # Benchmark threads:      2

                       Compressing  |                  Decompressing
Dict     Speed Usage    R/U Rating  |      Speed Usage    R/U Rating
         KiB/s     %   MIPS   MIPS  |      KiB/s     %   MIPS   MIPS

22:       6492   184   3439   6316  |      72353   199   3098   6178
23:       6405   189   3449   6526  |      70220   199   3048   6078
24:       6140   190   3466   6602  |      67929   199   2991   5964
25:       5854   191   3505   6684  |      65399   199   2920   5821
----------------------------------  | ------------------------------
Avr:             189   3465   6532  |              199   3014   6010
Tot:             194   3239   6271



7-Zip (a) [64] 16.04 : Copyright (c) 1999-2016 Igor Pavlov : 2016-10-04
p7zip Version 16.04 (locale=C,Utf16=off,HugeFiles=on,64 bits,4 CPUs LE)

LE
CPU Freq:  2531  2833  2835  2836  2835  2836  2836  2836  2836

RAM size:    5524 MB,  # CPU hardware threads:   4
RAM usage:    882 MB,  # Benchmark threads:      4

                       Compressing  |                  Decompressing
Dict     Speed Usage    R/U Rating  |      Speed Usage    R/U Rating
         KiB/s     %   MIPS   MIPS  |      KiB/s     %   MIPS   MIPS

22:      12565   357   3424  12223  |     143537   381   3215  12246
23:      12099   372   3310  12327  |     139947   381   3177  12109
24:      11246   366   3300  12093  |     135488   380   3130  11894
25:      10894   380   3272  12439  |     131685   381   3077  11720
----------------------------------  | ------------------------------
Avr:             369   3327  12271  |              381   3150  11992
Tot:             375   3238  12131



# Snapdragon 855: 1x A76 2840 MHz + 3x A76 2420 MHz + 4x A53 1780 MHz

# gcc-6 -march=armv8-a -O2

7-Zip (a) [64] 16.04 : Copyright (c) 1999-2016 Igor Pavlov : 2016-10-04
p7zip Version 16.04 (locale=C,Utf16=off,HugeFiles=on,64 bits,8 CPUs LE)

LE
CPU Freq:  2068  2732  2834  2837  2835  2836  2836  2836  2836

RAM size:    5524 MB,  # CPU hardware threads:   8
RAM usage:   1765 MB,  # Benchmark threads:      8

                       Compressing  |                  Decompressing
Dict     Speed Usage    R/U Rating  |      Speed Usage    R/U Rating
         KiB/s     %   MIPS   MIPS  |      KiB/s     %   MIPS   MIPS

22:      15941   755   2055  15508  |     229239   774   2525  19553
23:      14818   738   2046  15098  |     224322   778   2497  19412
24:      14314   765   2012  15391  |     218058   776   2465  19139
25:      13617   774   2008  15548  |     213197   782   2426  18974
----------------------------------  | ------------------------------
Avr:             758   2031  15386  |              778   2478  19269
Tot:             768   2254  17328


# 7z b -mm=* : MIPS and Effectiveness values are normalized with AMD K8 cpu.


RAM size:    5524 MB,  # CPU hardware threads:   1
RAM usage:    225 MB,  # Benchmark threads:      1


Method           Speed Usage    R/U Rating   E/U Effec
                 KiB/s     %   MIPS   MIPS     %     %

CPU                      100   2841   2836
CPU                      100   2841   2836
CPU                      100   2841   2836   100   100

LZMA:x1          16298   100   5972   5958   211   210
                 42466   100   3464   3458   122   122
LZMA:x5:mt1       2676   100   3358   3344   118   118
                 39815   100   3367   3358   119   118
LZMA:x5:mt2       3530   100   4427   4410   156   156
                 39944   100   3378   3369   119   119
Deflate:x1       37949   100   4830   4819   170   170
                131471   100   4093   4085   144   144
Deflate:x5       12964   100   5002   4991   176   176
                131453   100   4089   4081   144   144
Deflate:x7        4870   100   5408   5396   191   190
                132560   100   4121   4113   145   145
Deflate64:x5     11979   100   5188   5177   183   183
                131007   100   4105   4098   145   144
BZip2:x1          6949   100   4208   4198   148   148
                 35552   100   3862   3854   136   136
BZip2:x5          5402   100   4522   4509   159   159
                 24777   100   4877   4863   172   171
BZip2:x5:mt2      5403   100   4524   4510   160   159
                 22280   100   4387   4373   155   154
BZip2:x7          1807   100   4694   4682   165   165
                 24901   100   4897   4883   173   172
PPMD:x1           4863   100   5041   5030   178   177
                  4241   100   5005   4995   176   176
PPMD:x5           2893   100   4923   4904   174   173
                  2526   100   4751   4734   168   167
Delta:4         846643   100   5211   5202   184   183
                763507   100   4699   4691   166   165
BCJ            1189144   100   4879   4871   172   172
               1181311   100   4847   4839   171   171
AES256CBC:1     167293   100   4118   4111   145   145
                153827   100   3787   3780   134   133
AES256CBC:2 

CRC32:1         394656   100   2878   2873   101   101
CRC32:4        1000161   100   2236   2232    79    79
CRC32:8        1769098   100   2403   2399    85    85
CRC64           976356   100   2003   2000    71    71
SHA256          245317   100   5013   5004   177   176
SHA1            437246   100   4099   4093   145   144
BLAKE2sp        302459   100   6665   6654   235   235

CPU                      100   2841   2836
------------------------------------------------------
Tot:                     100   4080   4070   144   143

Links

ARM Cortex-A76 at Wikipedia

ARM Cortex-A76 at WikiChip